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===GPIO and Device Tree=== | ===GPIO and Device Tree=== | ||
It's necessary to place the GPIO in Device Tree to configure the GPIO to work in a mode of software SPI, I2C, for GPIO to be used as the source of the interrupt, etc. | |||
For example on a pin 10 @ UEXT1 (CS) and pins 5 @ UEXT2 (SCL), 6 @ UEXT2 (SDA), 10 @ UEXT2 (CS) | For example on a pin 10 @ UEXT1 (CS) and pins 5 @ UEXT2 (SCL), 6 @ UEXT2 (SDA), 10 @ UEXT2 (CS) GPIO processor lines are derived. They can be configured to use such as a chip-select for SPI or as I2C. | ||
GPIO processor and peripherals are divided into banks (gpio chip). GPIO processor split into 3 banks for 32 GPIO: gpio0, gpio1, gpio2. Addressing GPIO in Device Tree comes to the number of the bank and the number of GPIO * in * the bank. | GPIO processor and peripherals are divided into banks (gpio chip). GPIO processor split into 3 banks for 32 GPIO: gpio0, gpio1, gpio2. Addressing GPIO in Device Tree comes to the number of the bank and the number of GPIO * in * the bank. |
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