Работа с GPIO/en: различия между версиями

Работа с GPIO/en (просмотреть исходный код)

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Версия 17:57, 24 апреля 2019 (просмотреть исходный код) RomanKulibaba (обсуждение \| вклад) ← Предыдущая правка		Версия 17:58, 24 апреля 2019 (просмотреть исходный код) RomanKulibaba (обсуждение \| вклад) Следующая правка →
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	For example on a pin 10 @ UEXT1 (CS) and pins 5 @ UEXT2 (SCL), 6 @ UEXT2 (SDA), 10 @ UEXT2 (CS) GPIO processor lines are derived. They can be configured to use such as a chip-select for SPI or as I2C.		For example on a pin 10 @ UEXT1 (CS) and pins 5 @ UEXT2 (SCL), 6 @ UEXT2 (SDA), 10 @ UEXT2 (CS) GPIO processor lines are derived. They can be configured to use such as a chip-select for SPI or as I2C.

	~~GPIO~~ processor and peripherals are divided into banks (gpio chip). GPIO ~~processor~~ split into 3 banks for 32 GPIO: gpio0, gpio1, gpio2. Addressing GPIO in Device Tree comes to the number of the bank and the number of GPIO * in * the bank.		The processor's and peripherals' GPIOs are divided into banks (gpio chip).Processor's GPIO are split into 3 banks for 32 GPIO: gpio0, gpio1, gpio2. Addressing GPIO in Device Tree comes to the number of the bank and the number of GPIO * in * the bank.