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(не показано 5 промежуточных версий этого же участника) | |||
Строка 129: | Строка 129: | ||
For example on a pin 10 @ UEXT1 (CS) and pins 5 @ UEXT2 (SCL), 6 @ UEXT2 (SDA), 10 @ UEXT2 (CS) GPIO processor lines are derived. They can be configured to use such as a chip-select for SPI or as I2C. | For example on a pin 10 @ UEXT1 (CS) and pins 5 @ UEXT2 (SCL), 6 @ UEXT2 (SDA), 10 @ UEXT2 (CS) GPIO processor lines are derived. They can be configured to use such as a chip-select for SPI or as I2C. | ||
The processor's and peripherals' GPIOs are divided into banks (gpio chip).Processor's GPIO are split into 3 banks for 32 GPIO: gpio0, gpio1, gpio2. Addressing GPIO in Device Tree comes to the number of the bank and the number of GPIO * in * the bank. | |||
====Example 1==== | ====Example 1==== | ||
We define signal 6 @ UEXT2 (SDA) as the source of the interrupt driver mrf24j40. According to the table [[Special: MyLanguage / | We define signal 6 @ UEXT2 (SDA) as the source of the interrupt driver mrf24j40. According to the table [[Special:MyLanguage/Список_GPIO/en|List of GPIOs]], signal corresponds to 53 GPIO of processor. 53 belongs to the second bank gpio (32 to 63). GPIO number inside the bank 53-32 = 21: | ||
<pre> | <pre> |
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