ADC: различия между версиями
Fizikdaos (обсуждение | вклад) |
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7 channels are exposed to terminal blocks. See [[Hardware_Overview_rev._2.8#Terminal_blocks]] for details. | 7 channels are exposed to terminal blocks. See [[Hardware_Overview_rev._2.8#Terminal_blocks]] for details. | ||
The main channel have 12K/33K dividers. Thus the input voltage for each channel is 1.364 * <measured voltage> | The main channel have 12K/33K dividers. Thus the input voltage for each channel is 1.364 * <measured voltage>. Maximum measuring voltage - 5 V | ||
Some of the ADC channels share terminal blocks with FET. Please make sure you have explicitly closed the corresponding FET using GPIO before using ADC. | Some of the ADC channels share terminal blocks with FET. Please make sure you have explicitly closed the corresponding FET using GPIO before using ADC. |